JTAG/Background Debug Mode Test System PXI Card


The NX5300 is a single slot 3U PXI device and interfaces to the unit under test via an On-Chip Debug (OCD) or JTAG port. The NX5300 is a high performance JTAG based background debug mode (BDM) diagnostic system designed for functional test, development, programming and troubleshooting of microprocessor and microcontroller based embedded processor systems. Advanced capabilities include simultaneous support of up to 255 devices on a single scan chain, support of sixteen NX5300 systems controlled by single host machine and configurable JTAG/BDM clock rates up to 24 MHz. The NX5300 includes 16 high-speed measurement channels. Each channel can measure logic levels, frequency, count events and perform a CRC check at rates up to 100 MHz.

The NX5300 can also be used to record and playback serial vector format (SVF) files. Using additional software, in conjunction with boundary scan description language (BSDL) files, the NX5300 can monitor a UUT’s boundary scan pins, change the state of any pin, and record an entire sequence of vectors from a known good board. These same vectors can then be used to test other boards, without having to create net lists or digital test vectors – offering an efficient and cost-effective test methodology for complex digital boards and devices.


A Windows graphical user interface is included with built-in functions such as memory read, memory write, I/O read, I/O write which provide full access to the UUT. Higher level functions such as bus diagnostics, memory tests, memory move and copy operations can also be executed with a single command. A built in macro language supports easy development of complex test procedures without the need to learn a programming language. The NX5300 can interface to any programming language capable of supporting DLL’s such as Visual C, Visual Basic, ATEasy™, Delphi™, LabView™ and LabWindows/CVI™.