Boundary Scan or JTAG, formally known as IEEE/ANSI 1149.1_1190 is a standard which facilitates testing, device programming and debugging at the semiconductor, board and system levels. The standard came about as a result of the efforts of a Joint Test Action Group (JTAG) formed by several North American and European companies. IEEE Std 1149.1 was originally developed as an on-chip test infrastructure capable of extending the lifetime of available automatic test equipment (ATE). This methodology of incorporating design-for-test allows complete control and access to the boundary pins of a device without the need for a bed-of -nails or other test equipment.

Terotest are the sole UK representatives of Acculogic, providers of the best-in-class Boundary Scan tools for automated test and on board programming application. Terotest can provide customers with Acculogic's comprehensive line of PC-based hardware and software tools, based on Teradyne's VICTORY range, specially designed for testing of electronic devices, together with boards and systems using the IEEE1149.1 and IEEE1149.6 standards. Terotest supply Boundary Scan systems, modules and software, and can also integrate the Acculogic Boundary Scan range into bespoke test solutions as part of our custom test solutions service.